1. Technical Field
The present disclosure relates to the field of stressed semiconductor layers, and in particular to a method for forming a stressed semiconductor layer.
2. Description of the Related Art
The performance of certain types of transistors such as p-channel and n-channel MOS transistors can be greatly improved by the introduction of stress into the channel region.
In particular, for P-type metal-oxide-semiconductor (PMOS) transistors, the presence of compressive stress in the channel region generally leads to an increase in hole mobility, and thus an improvement in terms of switching speed.
For N-type metal-oxide-semiconductor (NMOS) transistors, the presence of tensile stress in the channel region generally leads to an increase in the electron mobility, and thus an improvement in terms of switching speed.
However, existing transistor processing methods generally lead to transistors having channels that are stressed in a non-optimal fashion, leading to non-optimal transistor performance. There is thus a need for a method of forming a stressed semiconductor layer leading to increased transistor performance.